At present, with the prosperous growth to the consuming electrical products, the current trend of consumers' demand and need for the dimension of such products is almost towards small size and delicacy design. In order to substantially improve the sophistication during the fabricating process for a semiconductor and to shrink the scale of these products, a lithography process in a semiconductor fabricating process becomes very critical. That is, if the resolution of a lithography process could be further improved to reduce the analytic coefficient k1, the critical dimension in the succeeding fabricating steps could correspondingly become smaller so that a finer and more sophisticated semiconductor product is then obtainable.
Due to the contribution of an excimer laser, the resolution of lithography is propelled to the scale around 100 nm (nanometer) and even the critical dimension of a node is further pushed to the scale around 45 nm. However, once the lithography resolution is reduced to the scale around 0.25 nm or even lower than 0.25 nm, because of the inherent limitation of the optical characteristic, the optical lithography technique at the present state is inapplicable.
In order to overcome the mentioned defects in the existing lithography technique and to simultaneously improve the resolution of a lithography process, a method of improving the lithography resolution for a semiconductor is provided.